【摘要】 采用线性时变(LTV)模型分析了电压偏置型 CMOS LC 交叉耦合压控振荡器(VCO)的相位噪声。以相位噪声为优化目标,元件参数为设计变量,根据理论计算与仿真结果确定了晶体管宽长比和谐振腔电感的最佳值,完成了电路的优化过程。并以此优化结果为依据,用 0.18gm CMOS 工艺设计、实现了一个芯片面积为1.1mm×0.7rnm 的 LC 交叉耦合振荡器。测试结果表明,在1.8V 电源电压下,该压控振荡器的频率范围覆盖1150～1210 MHz,10kHz 频偏处相位噪声达到-89dBc/Hz,核心电流4.3mA,抑制相位噪声性能优于其他振荡器。更多还原

【Abstract】 A linear time variant(LTV)model was used to analyze the phase noise performance of voltage biased CMOS LC vohage-controlled oscillators(VCOs).Then the optimization of VCO circuits was conducted with the goal of reducing VCOs’ phase noise.Specifically,the design variables,namely the device parameters such as the transistor’s width- length ratio and the tank inductor’ s value,were optimized according to the results of theoretical calculation and simula- tion.And on the basis of this,a LC cross-coupled oscillator with the chip size of 1.lmm x 0.7mm was designed and re- alized in a standard 0.18μm CMOS technology.The test results showed that under a voltage supply of 1.8V,the DC cur- rent of the oscillator was 4.3mA,the frequency range of the VCO covered 1150～1210MHz,and the phase noise was- 89 dBc/Hz at 10kHz offset from the carrier,and the phase noise performance was better than other VCOs.更多还原