【摘要】 为了简化扩频系统中同步接收机的电路结构,针对DS-UWB无载波的特性,设计了一种无需载波跟踪环,工作在码片速率的扩频解扩及其同步电路,采用Verilog HDL描述电路,然后对该电路进行了功能和时序仿真,最后在Altera的Cy-cloneII系列芯片上验证了该电路,并用逻辑分析仪观测波形。结果表明,电路工作正确可靠,占用逻辑单元数仅694个,最高工作频率为113MHz,同步精度可以达到1/4个码片。更多还原

【Abstract】 In order to simplify synchronizing receiver’s circuit structure in spread-spectrum system,a synchronization circuit which is without carrier wave tracking loop and works at a chip rate is designed according to the character of DS-UWB without carrier wave.Then,this circuit is described by Verilog HDL and both functional simulation and timing simulation is done.Finally,this circuit is verified with Altera’s CycloneII circuit and waveform is measured by logic analyzer.The results suggests that this circuit works well,only takes up 694 logic elements,working frequency can reach up to 113 MHz.The synchronous precision is 1/4 chip.更多还原