节点文献
基于DSP处理器的加法器的设计
Design of Adder Based on DSP Processor
【摘要】 从延迟、功耗、面积等方面对加法器的实现方式性能的比较,适应兼容TMS320C54XDSP处理器的高速、低功耗的需要和结构特点,而采用超前进位加法器的两种设计方案,通过两种方案性能对比和结果分析,最终采用4位一组的分组结构,完成了DSP处理器的40位加法器的设计。
【Abstract】 Compared with performance of adder’s implement mode such as delay,power and area and so on,two design schemes adopt carry look-ahead adder to suit structural character and demand of high speed,low power for DSP compatible with TMS320C54X;overpass performance compare and result analysis for two design schemes,finally grouping structure of a partion per four bits is adopted and design of 40-bit adder of DSP has been finished.
- 【文献出处】 微电子学与计算机 ,Microelectronics & Computer , 编辑部邮箱 ,2007年12期
- 【分类号】TP332.2
- 【被引频次】2
- 【下载频次】164