【摘要】 本文介绍了高速嵌入式领域中,一种基于FPGA设计的单芯片芯片组解决方案。系统采用HDL语言实现,可移植性好,便于重用;实现了MIPSCPU接口,包括NAND,SDRAM,SRAM等MEMORY控制器,以及ATA设备接口,同时实现了包括串口(UART),定时器(Timer),中断控制器(IRC)等完整调试机制。通过了功能验证以及速度测试,工作时钟可达到133MHz,数据传输速率可达20MB,高于国内外同类设计。通过实验结果,可以得出结论:设计完全满足当前高速嵌入式系统的性能要求,稍加改动就能够适应不同的应用场合,具有很大的实用意义。更多还原

【Abstract】 A method based on FPGA to solve the single-chip chipset problem in High speed embedded system is developed in this paper.This method is designed in HDL language and it has good portability and reusability.This system has several functions such as the MIPS CPU interface which including memory controller(such as NAND,SDRAM and SRAM etc),the ATA device interface and a whole harmony mechanism such as the UART,Timer and IRC and so on.Through validating these functions and testing the velocity,we find that the work timer can reach 133MHz and data transmission velocity can reach 20MByte/s,which is better than that of existing products in system’s performance.So we can draw a conclusions that the designing can satisfy the demand of current high speed embedded system and can also be used in many different application environments through a little modifying,which is of great practical significance.更多还原