【摘要】 本文采用查找表法实现了cdma20001x脉冲成形滤波器,相对于传统的滤波器设计方法,本文充分利用了滤波器系数对称的特性,并考虑到4倍过采样是采用内插三个零来完成这一特点,巧妙设计了数据查找存储表,节省了大量硬件资源。整个系统用verilog HDL语言RTL级描述。系统经过了FPGA验证并给出了仿真结果。更多还原

【Abstract】 In this paper, a method to design and implement of baseband pluse shaping filter in cdma2000 1x system based on Look-Up Table is proposed. Considering the coefficient symmetry of the filter and interposition of 3 zeros for the oversampled rate of four fold, the design is efficient compared to the conventional design way. Because the extra sample points added are zeros, they do not contribute to the output. The novel design reduces the chip resoureces much. The system is described in verilog HDL and is verified with Xilinx FPGA..The implemented circuit is simulated and the result shows that the circuit works reliably .更多还原