节点文献
一种嵌入式网络硬盘录像机的硬件设计和实现
The hardware design and realization of a embedded digital video recorder
【摘要】 对一种基于ARM处理器的嵌入式网络硬盘录像机的硬件设计及其实现方法进行了介绍.该设备的主要任务是对模拟的视频和音频信号进行MPEG4数字化压缩和文件存储,并对视频文件进行检索、管理、回放和网络传输.其硬件结构是以S3C2510(ARM940T)为主的CPU,以CPU内置的PCI主桥连接多个TMSDDVI602GDK600多媒体处理器,构成一个多处理器嵌入式系统.MPEG4格式的视频和音频压缩和解压缩在TMSDDVI602GDK600中完成,压缩后的数据流经主CPU整理成文件并存储到硬盘录像机的硬盘库中.在本系统中,利用CPLD对PCI设备的中断逻辑进行了优化,提高了CPU的数据采集和存储效率.该设备经用户实际使用,在功能和性能上均得到了用户的好评.
【Abstract】 The article introduces the hardware design and realization of a embedded digital video recorder(DVR) based on ARM processor. The DVR is designed for the applications of MPEG4 video compressing and audio compressing and storing the compressed data into video files, and further more it also perform file search, file management, playing back and network communication. As for the hardware structure, the master processor of the system is S3C2510(ARM940T), with its integrated host PCI bridge connecting to several TMSDDVI602GDK600 multimedia processors, ARM940T and multimedia processors compose an embedded multiprocessor system. TMSDDVI602GDK600 act as MPEG4 video/audio encoding and decoding processor. The encoded data stream is arranged by the master processor and stored into hard disks in the DVR. In the system, CPLD is applied to optimize the interrupt logic of the PCI devices, so the performance of the system is improved obviously. Applied practically, the DVR is applauded by the users for its function and performance.
- 【文献出处】 浙江工业大学学报 ,Journal of Zhejiang University of Technology , 编辑部邮箱 ,2005年01期
- 【分类号】TN946
- 【被引频次】5
- 【下载频次】258