【摘要】 提出了一种高速高分辨率的过采样率可配置的四阶基于2-1-1级联拓扑结构的SigmaDeltaA/D转换器的设计方法。设计采用的是0.18μmCMOS混合工艺,模拟电路和数字电路的供电电压分别为3.3V和1.8V。该转换器的采样时钟速率最高可以达到64MHz,过采样率可以配置为32、16两种方式,当过采样率为32时,可达到115dB的无杂散动态范围和95dB的信噪比,总功耗约为200mW。更多还原

【Abstract】 A high speed high resolution fourth-order sigma delta converter with configurable over sampling rate, based on a 2-1-1 cascaded topology is presented. The converter is implemented with 0.18μm CMOS mixed signal process. The analog part and digital part are supplied with 3.3V and 1.8V voltage respectively. The sampling clock rate can be up to 64MHz. The over sampling rate (OSR) can be configured as 32, 16. When OSR is 32, the converter can achieve 115dB SFDR and 95dB SNR. The power dissipation is about 200mW.更多还原