【摘要】 随着集成电路设计规模的不断增加,传统的验证方法学由于无法提供足够的能力来检查系统所有可能功能的正确性,已经不能满足SOC验证的需求。验证重用方法学是解决这一问题的有效途径。在SOC的验证过程中,利用总线协议检验器对片上总线上发生的事务进行协议检验,并将检验结果以文本格式显示出来,从而可以帮助验证工程师有效地判断数据传输的正确性,达到验证单个模块和系统功能的目的。总线协议检验器比传统的总线监视器存在自动化程度较高等优点,增强了验证的自动化,减少了验证时间,提高了验证效率。文中提出了一种总线协议检验器的设计方法,并给出了具体的实现过程。更多还原

【Abstract】 As the growth of the VLSI design scale, traditional verification methods can not satisfy the SOC verification request, because it dose not supply the enough ability to check all the function rightness and can not ensure the product quality. Verification reuse methodology can solve this problem effectively. In SOC verification,can make use of bus protocol checker to monitor bus, and monitor result display in a special format, so can estimate the validity of bus data, and check models and the system. Bus protocol checker, which improves automation, reduces verification time and increases verification efficiency, is beneficial to automation compared to the bus monitor. A bus protocol checker has been presented and implementation has been given.更多还原