【摘要】 基于FPGA的查找表LUT结构,提出了一种改进DA算法,在时域实现高速、高阶FIR滤波器,以满足雷达数字脉冲压缩的需要,并在Xilinx公司的VertexIIFPGA上进行了试验验证。更多还原

【Abstract】 Based on FPGA LUT structure, it is presented a modified Distributed Arithmetic(DA) to implement high-speed and high-order FIR filter in time domain, so that it can be satisfied with processing high speed and wide band pulse compression radar signal. This method is verified by using Xilinx Vertex II FPGA.更多还原