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基于Max-Log-MAP算法的Turbo码的硬件设计与实现
Turbo Codes’ Hardware Design and Realization Based on Max-Log-Map Arithmetic
【摘要】 Turbo码的应用使得信道编码技术发生了革命性的变化,其译码性能距离Shannon极限只有0.7dB,因而被广泛用于功率受限的无线信道。针对3GPPTS25.212协议给出的WCDMA系统中的Turbo编码器结构,提出了一种硬件实现方法,用VerilogHDL语言描述了译码器各功能模块,并在activeHDL中实现了编译和仿真。
【Abstract】 The application of Turbo coding leads to the revolution in coding technology and the performance is within 0.7dB of the Shannon limitation.Hence it is widely used in power-limited wireless system.According to the Turbo coder structure in the WCDMA system defined by 3GPP TS 25.212 agreement,the paper introduces a hardware implementation method,i.e.to use Verilog HDL language to describe the coder function modules,and the code/decode and simulation are achieved.
- 【文献出处】 江西科技师范学院学报 ,Journal of Jiangxi Science & Technology Teahers’ College , 编辑部邮箱 ,2005年04期
- 【分类号】TN762
- 【被引频次】1
- 【下载频次】180