节点文献
数字实验电路的MAX+PLUSⅡ与可编程逻辑器件设计
Designing Digital Experimental Circuit with MAX+PLUSⅡ and Programmable Logic Device
【摘要】 本文介绍了应用新技术(MAX+PLUSII软件)和新器件PLD(可编程逻辑器件)设计七进制计数器实验电路的输入,项目编译,分配I/O管脚,波形仿真,定时分析和器件编程的全过程。并用VDHL语言编写了七进制计数器实验电路的文本输入。
【Abstract】 The introduction to this article uses the new technology (MAX +PLUSII software ) and new device PLD (programmable logic device ) to design the introduction of the experiment circuit of septenary counter , the project is compiled, assign I/O to manage the foot , wave form emulation , timing analysis and the whole course of device programming, and has written the text of the experiment circuit of septenary counter to input in VDHL language.
【关键词】 PLD;
计数器;
设计编译;
性能仿真;
器件编程;
【Key words】 PLD; counter; design and compilation; functional simulation; device programming;
【Key words】 PLD; counter; design and compilation; functional simulation; device programming;
- 【文献出处】 福建教育学院学报 ,Journal of Fujian Institute of Education , 编辑部邮箱 ,2005年07期
- 【分类号】TN79;
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