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CMOS组合电路开路故障的BIST探讨

Built-in Self Test Study for Stuck-open Faults of CMOS Combinational Circuits

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【摘要】 对CMOS组合电路开路故障的测试方法进行了探讨.一种方法通过对电路输出的跳变次数进行计数,然后与无故障电路输出的跳变次数的期望值进行比较,可以检测到所有的开路故障,对于有n个输入端的电路完成测试需要6×2n个测试向量.另一种方法基于种子存储的自适应BIST方法,该方法充分利用开路故障的特征,实例验证表明能够在3×2n+1个时钟周期内完成对CMOS组合电路开路故障的测试,它在不用修改被测电路网络的前提下可对多开路故障达到完全的测试.

【Abstract】 Two Built-in self-test methods for Stuck-open faults testing of CMOS combinational circuits are proposed. In the first method, the transition number of CUT’s output is counted and then compared to the anticipant one of the fault-free circuit. For an n-inputs CMOS combinational circuits, 6×2~n test vectors are needed to finish the BIST process and all the Stuck-open faults can be tested. Another method is ROM-based adaptive BIST, which efficiently utilizes the properties of Stuck-open faults. simulation result shows it can accomplish self test within 3×2~n+1 test vectors. Meanwhile, CUT modification is no longer needed and 100% fault coverage for multiple Stuck-open faults can also be achieved.

【基金】 国家自然科学基金资助项目(90207002;60073032)
  • 【文献出处】 复旦学报(自然科学版) ,Journal of Fudan University , 编辑部邮箱 ,2005年01期
  • 【分类号】TN407
  • 【被引频次】1
  • 【下载频次】84
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