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低电压低功耗带通Sigma Delta调制器的设计
The Design of Low Voltage Low Power Bandpass Sigma Delta Modulator
【摘要】 本文设计了一种符合双标准接收机要求的一位四阶带通调制器.为了实现低电压低功耗设计的要求,改进了调制器结构,并进行了从系统到电路模块的优化.采用0.35μm CMOS工艺,Hspice和Matlab联合模拟表明:在2V电源电压下,调制器在GSM和WCDMA系统中的DR分别为86dB和36dB,而功耗仅为10.5mW和12mW.
【Abstract】 This paper presented a single-bit fourth-order sigma delta modulator for dual-standard receiver.The low voltage and low power target is attained by improving the modulator structure and optimizing from system to circuit blocks.Hspice and Matlab co-simulation with 0.35μm CMOS technology indates that dynamic range is 86dB for GSM,36dB for WCDMA respectively and power dissipation is only 10.5mW and 12mW with 2V power supply.
【关键词】 带通∑Δ调制;
低功耗;
低电压运放;
自举开关;
【Key words】 bandpass sigma delta modulation; low power; low voltage operational amplifier; bootstraped switch;
【Key words】 bandpass sigma delta modulation; low power; low voltage operational amplifier; bootstraped switch;
- 【文献出处】 电子学报 ,Acta Electronica Sinica , 编辑部邮箱 ,2005年11期
- 【分类号】TN761
- 【被引频次】4
- 【下载频次】215