节点文献
基于帧级流水脉动阵列结构的运动估计电路
Frame-Level Pipelined Array Architecture for Motion Estimation
【摘要】 在将标准的六层Do循环嵌套FSBM算法等效变换成一种新的两层Do循环嵌套算法的基础上,本文提出了三种基于搜索距离分别为P=KN(K≥1),P=N/2和P=N的脉动阵列结构的运动估计电路.上述结构除了支持帧级流水操作外,而且在取得近似100%的阵列流水效率的同时,具有硬件开销小、输入端口数少等特点,可广泛应用于DTV和HDTV等领域.
【Abstract】 Three efficient FSBM motion estimation systolic array architectures for search rangeP=KN(K≥1),P=N/2 and P=N,and are proposed in this paper,based on mapping the standard six-level nested Do-loop FSBM algorithm into a two-level nested Do-loop algorithm equivalently.These new architectures not only support frame-level pipelined operation,but also achieve nearly 100% processor utilization,require much fewer input pin count and hardware overhead.As such,these architectures offer a feasible solution for Digital TV and HDTV video picture format.
【关键词】 全搜索块匹配算法;
脉动阵列;
运动估计;
VLSI结构;
【Key words】 full-search block-matching algorithm; systolic array; motion estimation; VLSI architecture;
【Key words】 full-search block-matching algorithm; systolic array; motion estimation; VLSI architecture;
- 【文献出处】 电子学报 ,Acta Electronica Sinica , 编辑部邮箱 ,2005年08期
- 【分类号】TN76
- 【被引频次】9
- 【下载频次】129