【摘要】 文中给出基于VHDL语言的线性相位FLR(Finite Impulse Response)滤波器的设计方案。本方案利用Quar-tus Ⅱ4.1和MATLAB 6.5为设计工具,介绍给定指标的线性相位FIR滤波器的设计和实现,通过仿真验证该设计方案是可行的。该方案具有设计简单、移植性强、可扩展性好等特点,便于在不同规模的FPGA上实现。更多还原

【Abstract】 In this paper, a scheme of a linear phase FIR digital filter with window function method based on VHDL Lan- guage is proposed. In this scheme, the design and realization of a desired linear phase FIR digital filter is introduced in detail. The scheme is proved feasible by simulation from Quartus Ⅱ 4. 1 and MATLAB 6. 5. The scheme has advantages of simiple de- sign, strong transplant and good expansibility etc, so it is convenient to implement on FPGA of different scales.更多还原