【摘要】 介绍了用可编程逻辑器件CPLD及硬件描述语言VHDL设计数字系统的方法和采用CPLD器件进行电路设计的优点,着重介绍了在电子系统设计中,使用CPLD器件和传统集成电路设计的不同,采用CPLD设计是一种基于芯片的、“自顶向下”的设计方法,本文给出了一种键盘扫描的硬件及软件的设计实例。更多还原

【Abstract】 The method to design the digital system through programmable logic devices—CPLD and hardware description language—VHDL and the advantages of the application of CPLD in the circuit design are introduced and then the differences are mainly analyzed between applying CPLD and applying the traditional integrated circuit.The CPLD design is based on the CMOS chip and is a kind of method from top to bottom.The text gives a design example of hardware and software in the keyboard scanning.更多还原