节点文献
Nios3.0CPU体系结构
The Architecture Of Nios 3.0 CPU
【摘要】 Altera的Nios嵌入式处理器是一个通用的RISC(精简指令集)处理嚣,在Altera的FPGA中以软核的形式实现。Nios处理器以其低成本,设计灵活等特点,在嵌入式领域得到广泛的应用。针对目前越来越多的利用Nios进行嵌入式系统的应用开发,文中介绍了Nios 3.0 CPU的体系结构以及与之相关的开发技术。
【Abstract】 The Nios embedded processor is a general-purpose RISC CPU implemented as a soft core in Altera FPGAs. It has been widely employed in the field of embedded system for its low cost and flexible design. This article introduces the architecture of Nios 3.0 CPU and the exploitation technology concerned,in order to use Nios on different applications and have more and more embedded system development.
- 【文献出处】 皖西学院学报 ,Journal of Wanxi University , 编辑部邮箱 ,2004年05期
- 【分类号】TP332
- 【被引频次】1
- 【下载频次】152