【摘要】 通过用FPGA芯片来实现交流调速数字控制系统的测速环节、信号锁相和晶闸管触发时刻控制环节、鉴相环节的功能 ,以减轻主控系统的负担 ,降低硬件的复杂程度 ,同时具有一定的通用性和智能性。各环节的设计均通过VHDL语言进行描述 ,并分别给出了其中的原理和实现方法更多还原

【Abstract】 This paper uses the FPGA chip to realize the function of speed measuring part, signal locking part and SCR triggering time control part, phrase identification part, the purpose is to release the burden of primary control system and lower the complexity of hardware, at the same time. It has some certainty of generality and intelligence. All the parts are described by VHDL language, the principle and the realization method is also explained.更多还原