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基于坐标逻辑的形态图像处理器的硬件实现
A hardware realization of morphological image processor based on coordinate logic
【摘要】 在阐述坐标逻辑运算的基础上 ,论述了基于坐标逻辑形态学硬件实现的图像处理系统 .该系统采用DSP +FPGA的框架结构 ,利用FPGA的可重构特性将其中一片FPGA作为协处理器可以实现不同的图像处理功能 .将坐标逻辑和传统形态学硬件实现的形态图像处理器在处理效果和速度两个方面作了比较 .算法在FPGA芯片上的高速实现特征使数学形态学在图像实时处理领域的应用成为可能
【Abstract】 The basis of a coordinate logic operations (CLO) was introduced and an image processing system with coordinate logic implemented by hardware presented. The system was composed of DSP and FPGA.One FPGA as coprocessor may implement different functions due to its re-configurable characteristic. The image processors realized by coordinate logic and standard morphology were compared in effect and speed. The algorithm was implemented and its speed was very high. It makes possible that mathematical morphology is applicable in real time image processing.
【Key words】 image processor; coordinate logic; re-configurable; coprocessor; DSP; FPGA;
- 【文献出处】 华中科技大学学报(自然科学版) ,Journal of Huazhong University of Science and Technology , 编辑部邮箱 ,2004年06期
- 【分类号】TP332
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