节点文献
低电压低功耗全加器的研究设计
A Low-voltage and Low-power Full-adder
【摘要】 采用传输管逻辑和低电压 XOR/XNOR结构 ,设计了一种新型的适用于低电源电压下工作的低功耗高速全加器电路。在 1 .8V工作电压下 ,获得了运算时间为 0 .85 lns,平均功耗 ( 5 0 MHz) 3.35 μW的良好特性。
【Abstract】 This paper describes a low-power and high-speed new full-adder circuit,which is fit for low supply voltage.The full-adder is designed uitilizing pass-transisitor logic and XOR/XNOR structure which is able to work at low supply voltage well.At 1.8 V supply voltage,the operation time of the full-adder is 0.851 ns,and the average power dissipation is 3.35 μW at a frequency of 50 MHz.
- 【文献出处】 固体电子学研究与进展 ,Research & Progress of Solid State Electronics , 编辑部邮箱 ,2004年03期
- 【分类号】TP331
- 【被引频次】7
- 【下载频次】238