【摘要】 根据甚短距离 (VSR)光纤传输系统中转换接收芯片帧同步系统的设计思想 ,参考ITU T关于同步数字系列 (SDH)技术的建议 ,分析了帧同步系统的关键性能参数 ,结合具体硬件电路的设计 ,选取了合适的参数。在此基础上 ,用VerilogHDL语言设计了帧同步系统 ,选用Altera公司的StratixEP1S2 5F780C5 ,对电路进行了仿真模拟。作为VSR实验系统关键电路之一 ,帧同步系统通过在系统测试 ,测试结果显示该帧同步系统能够在实际中应用。更多还原

【Abstract】 Basing on the design philosophy of the frame aligner in receive module of conversion IC in VSR optical transmission system, and according to the recommendation of ITU T about SDH, several parameters, which are important to the performance of the frame aligner, are analyzed and chosen with consideration of the circuit used. Basing on the analysis, the frame aligner is designed using Verilog HDL, and FPGAs of Stratix EP1S25F780C5 from Altera corporation. As one of the important parts of the VSR experimental system, the simulation and downloading to the device are accomplished. It is demonstrated that the design of the frame aligner is applicable to the VSR system.更多还原