【摘要】 在分析了USB 2 .0协议层通信原理的基础上 ,采用模块划分方法 ,将协议层划分为 3个主要模块 ,运用VerilogHDL语言完成了RTL(寄存器传输级 )设计 ,并在Cadence软件Verilog XL上通过了行为仿真。最后通过Xilinx公司的FPGAVirtex芯片加以实现 ,以XilinxISE软件布线后 ,仿真结果显示速度达到 5 2MHz ,完全满足USB 2 .0协议的要求。更多还原

【Abstract】 The realization of protocol layer of USB2.0 system based on RTL is presented in this paper .After analyzing the communication theory , protocol layer is partitioned into three main modules, and it is implemented with FPGA Virtex chip of Xilinx company. The result shows that its speed is up to 52 MHz which fully satisfies the request of USB 2.0 specification.更多还原