节点文献
24 Gbit/s 0.2μm PHEMT复接器
24 Gbit/s multiplexer using 0.2 μm PHEMT technology
【摘要】 本文利用Philips公司OMMIC 0 2 μmGaAsPHEMT工艺 ,设计出 2 4Gbit/s的复接器 .应用源极耦合FET逻辑 (SCFL) ,使逻辑电路能够在 2 4Gbit/s速率上正常工作 .时钟采用二倍频方案 ,解决了多级复接中的高速时钟问题 .改进异或门拓扑结构实现的二倍频器 ,结构简单、实用 ,降低了电路复杂度 .利用源极耦合电容的微分作用 ,加速晶体管开、关转换 ,提高了选择器工作速度 .芯片通过功能测试验证 ,数据速率可达到 2 4Gbit/s.
【Abstract】 A 24 Gbit/s multiplexer is realized by using OMMIC 0.2 μm PHEMT GaAs technology of Philips. This circuit is designed with SCFL structure. The clock signal is obtained by using a frequency doubler which uses a modified XOR topology,so that the complexity of the system is reduced. The speed of the selector is accelerated by applying a source-coupled capacitor which speeds up the PHEMT switches. The test results of the function verify that this chip can correctly work at 24 Gbit/s.
- 【文献出处】 东南大学学报(自然科学版) ,Journal of Southeast University (Natural Science Edition) , 编辑部邮箱 ,2004年03期
- 【分类号】TN492
- 【被引频次】3
- 【下载频次】49