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嵌入式处理器AU1100的存储器接口设计
Design on Memory Interface for Embedded CPU AU1100
【摘要】 采用NORFlash和NANDFlash设计嵌入式处理器AU1100的存储器接口。通过AU1100内嵌SDRAM总线控制器提供标准32位数据宽度总线接口,Flash直接挂接在静态总线上。软件设计中用于代码存储的NORFlash作为NANDFlash的补充,YaFFS文件系统管理NANDFlash,并进行坏块屏蔽。用增强型ECC/EDC算法检验NANDFlash以减少NANDFlash的位反率,保证系统的安全性和可靠性。
【Abstract】 The memory interface for embedded CPU AU1100 was designed with NOR Flash and NAND Flash. The standard bus interface that has 32 bits data width is offered through embedded SDRAM bus controller of AU1100, Flash can be directly connected on static bus. NOR Flash in code memory was used as supplement of NAND Flash in software design. YaFFS is used to manage NAND Flash and shield bad blocks. NAND Flash was checked with Enhanced ECC/EDC algorithm so as to reduce the flip-flop rate of NAND Flash, the stability and reliability of the system is ensured.
【Key words】 Memory interface; AU1100; NOR flash; NAND flash;
- 【文献出处】 兵工自动化 ,Ordnance Industry Automation , 编辑部邮箱 ,2004年03期
- 【分类号】TP333
- 【被引频次】6
- 【下载频次】113