节点文献

在形式验证和ATPG中的布尔可满足性问题

Formal Verification and ATPG Using Boolean Satisfiability

  • 推荐 CAJ下载
  • PDF下载
  • 不支持迅雷等下载工具,请取消加速工具后下载。

【作者】 邓雨春杨士元王红薛月菊

【Author】 Deng Yuchun Yang Shiyuan Wang Hong Xue Yueju (Department of Automation, Tsinghua University, Beijing 100084)

【机构】 清华大学自动化系清华大学自动化系 北京100084北京100084北京100084

【摘要】 介绍布尔可满足性 (SAT)求解程序在测试向量自动生成、符号模型检查、组合等价性检查和RTL电路设计验证等电子设计自动化领域中的应用 着重阐述如何在算法中有机地结合电路拓扑结构及其与特定应用相关的信息 ,以便提高问题求解效率 最后给出下一步可能的研究方向

【Abstract】 Boolean Satisfiability is probably the most studied of combinatorial search problems and finds a number of applications in electronic design automation (EDA). In recent years, quite a few new and efficient SAT solvers have been developed, which make it possible solving much larger problem instances. We highlight the use of SAT algorithm to solve lots of EDA problems in such diverse areas as test pattern generation, symbolic model checking, combinational equivalence checking, and verification for RTL design. In addition, it is stressed how the useful information of circuit structure and specific problems to be solved is introduced to accelerate the SAT based algorithms.

【基金】 国家自然科学基金重大项目 (90 2 0 70 16)资助
  • 【文献出处】 计算机辅助设计与图形学学报 ,Journal of Computer Aided Design & Computer Graphics , 编辑部邮箱 ,2003年10期
  • 【分类号】TN79
  • 【被引频次】14
  • 【下载频次】215
节点文献中: 

本文链接的文献网络图示:

本文的引文网络