节点文献
主从型D触发器的动态功耗分析
Dynamic power analysis of master-slave D flip-flop.
【摘要】 主从型D触发器的动态功耗同触发器内部节点上的信号跃迁情况和节点电容有关.基于D触发器的电路结构与MOS管参数,本文对主从型D触发器各个节点电容进行了计算.利用对各节点电容的计算值,便可估算在某一激励输入序列下的D触发器的动态功耗.Pspice模拟证实了该一动态功耗估算的准确性.搞清了D触发器内部诸结点电容与MOS管参数之间的关系亦为降低它的动态功耗提供了参考依据.
【Abstract】 The dynamic power dissipation of a master-slave D flip-flop (MSDFF) depends on the signal transitions and capacitances of the nodes inside the MSDFF. Based on the circuit configuration of the D flip-flop and parameters of MOS transistors, the capacitances of the nodes inside the D flip-flop are calculated in this paper. With these caluculated capacitances, the dynamic power of a MSDFF can be estimated for a given excitation input sequence. The precision of the estimation is verified by Pspice simulation. The relationship between node capacitances inside the D flip-flop and parameters of MOS transistors offers reference for reducing its dynamic power dissipation.
- 【文献出处】 浙江大学学报(理学版) ,Journal of Zhejiang University(Sciences Edition) , 编辑部邮箱 ,2003年01期
- 【分类号】TN782
- 【被引频次】9
- 【下载频次】457