节点文献
SiGe沟道SOI CMOS的设计及模拟
Design and Simulation of SiGe Channel SOI CMOS
【摘要】 在 SOI(Silicon on Insulator)结构硅膜上面生长一层 Si Ge合金 ,采用类似 SOICMOS工艺制作成具有Si Ge沟道的 SOICMOS集成电路。该电路不仅具有 SOICMOS电路的优点 ,而且因为 Si Ge中的载流子迁移率明显高于 Si中载流子的迁移率 ,所以提高了电路的速度和驱动能力。另外由于两种极性的 SOI MOSFET都采用 Si Ge沟道 ,就避免了只有 SOIPMOSFET采用 Si Ge沟道带来的选择性生长 Si Ge层的麻烦。采用二维工艺模拟得到了器件的结构 ,并以此结构参数进行了器件模拟。模拟结果表明 ,N沟和 P沟两种 MOSFET的驱动电流都有所增加 ,PMOSFET增加得更多一些
【Abstract】 It is reported that by depositing SiGe alloy on SOI, using the technologies similar to that of SOI CMOS, we can get the SiGe-channel SOI CMOS IC. This circuit has not only the advantages of SOI CMOS but also increases speed and driving capability with the help of the carrier mobility enhancement in SiGe alloy. Besides, as using SiGe channel in both PMOSFET and NMOSFET we can avoid the inconvenience of selective epitaxial growth process occured for only using SiGe channel in PMOSFET. Through two-dimension technology simulation we got the device structure, and corresponding device simulation was carried out based on it. The results of simulation indicate that the driving currents of p-channel and n-channel device both increase, especially for the PMOSFET.
- 【文献出处】 固体电子学研究与进展 ,Research & Progress of Solid State Electronics , 编辑部邮箱 ,2003年02期
- 【分类号】TN431
- 【被引频次】3
- 【下载频次】99