节点文献
一种基于PCI总线的可编程雷达信号模拟器实现
Realization of a Programmable Radar Echo Simulator Based on PCI Bus
【摘要】 针对目前雷达回波信号模拟器功能单一、信号回放速度低的问题 ,提出了采用计算机PCI总线式结构、高速FIFO和高速D A的实现方案 ,使模拟器的数据更新速度达到 8MHz,信号回放速率达到 73MHz;采用FPGA技术 ,使系统参数程控可选 ,且可方便地改动其组成结构以适应不同类型的雷达 .通过对合成孔径雷达(SAR ,SyntheticApertureRadar)回波信号的仿真输出 ,并经现场运行表明 ,该方案可行 ,样机运行可靠 ,满足对高分辨率图像的仿真要求 .
【Abstract】 To improve the performance of current radar echo signal simulators, a scheme was advanced with computer PCI bus organization, high speed FIFO and D/A. With the realization of this scheme, the simulator exhibits a data updating speed as high as 8?MHz and a signal conversion speed as high as 73?MHz. The use of FPGA technology made the system parameters programmable and able to change its structure expediently to adapt different types of radar. Through signal simulation output of synthetic aperture radar, the scheme was proved to be feasible. The operation of a sample machine was shown to be reliable and able to meet the needs of high resolution image simulation.
【Key words】 radar echo simulators； bus organization； synthetic aperture radar； FPGA technology；
- 【文献出处】 北京航空航天大学学报 ,Journal of Beijing University of Aeronautics and Astronautics , 编辑部邮箱 ,2003年01期
- 【分类号】TN955.1
- 【被引频次】20
- 【下载频次】206