节点文献
900MHz CMOS锁相环/频率综合器(英文)
A 900MHz CMOS PLL/Frequency Synthesizer Initialization Circuit
【摘要】 给出了一个 90 0 MHz CMOS锁相环 /频率综合器的设计 ,设计中采用了电流可变电荷泵及具有初始化电路的环路滤波器 .电荷泵电流对温度与电源电压变化的影响不敏感 ,同时电流的大小可通过外部控制信号进行切换控制而改变 .因此 ,锁相环的特性 ,诸如环路带宽等 ,也可通过电流的改变而改变 .采用具有初始化电路的环路滤波器可提高锁相环的启动速度 .另外采用了多模频率除法器以实现频率合成的功能 .该电路采用 0 .18μm、1.8V、1P6 M标准数字 CMOS工艺实现 .
【Abstract】 A 900MHz CMOS PLL/frequency synthesizer using current-adjustable charge-pump circuit and on-chip loop filter with initialization circuit is presented.The charge-pump current is insensitive to the changes of temperature and power supply.The value of the charge-pump current can be changed by switches,which are controlled by external signals.Thus the performance of the PLL,such as loop bandwidth,can be changed with the change of the charge-pump current.The loop filter initialization circuit can speed up the PLL when the power is on.A multi-modulus prescaler is used to fulfill the frequency synthesis.The circuit is designed using 0.18μm,1.8V,1P6M standard digital CMOS process.
- 【文献出处】 半导体学报 ,Chinese Journal of Semiconductors , 编辑部邮箱 ,2003年12期
- 【分类号】TN43
- 【被引频次】8
- 【下载频次】256