【摘要】 针对频率合成器的高速数据调制应用 ,采用误差反馈结构 ,设计了一个用于直接 ΔΣ调制频率合成器的 5 bit4阶 ΔΣ调制器 .该结构能简化多 bit量化器的设计 ,不会对调制输入信号产生采样延迟 .通过在传递函数中引入两个极点 ,获得了比多环路级联结构更好的系统噪声性能 .在电路实现上 ,采用 CSD方法实现滤波器的系数相乘 ,并通过对系数共同项的优化 ,减少了系统的硬件消耗和功耗 ,取得了好的系统性能更多还原

【Abstract】 A 5bit fourth order ΔΣ modulator is designed for the application of high speed data direct ΔΣ modulation of frequency synthesizer.A new structure--error feedback structure is adopted to facilitate the design of the multi bit quantizer.This structure also has an advantage that there is no sampling delay introduced into the input signal,which is very useful for this application.By adding two poles into the transfer function,better noise performances compared with that of the MASH structure are achieved.CSD method is used for the implementation of the multiplication of coefficients of digital filter.Adoption of this method and its common sub expression sharing give an important reduction of hardware and power dissipation.Good system performance is obtained.更多还原