节点文献
二维DwT/IDWT处理器的VLSI设计
A VLAI Architecture for Forward/Inverse 2D Discrete Wavelet Transform
【摘要】 在本文中,我们设计了基于多分辨分析,适合于硬件实现的二维DWT和IDWT实时系统.采用了top-down的VLSI设计方法,用硬件描述语言VHDL,在Synopsys系统中进行了验证和综合.综合结果表明:系统的规模为7140单元面积,对于四层二维小波变换,数据处理速度约可达到4Mpixel/s.
【Abstract】 A VLSI architecture for forward/inverse 2D discrete wavelet transform in realtime applications is presented in this paper. It is designed and verified by the hardware descirption language (VHDL)and is suitable for the hardware implementation. The VHDL of our architecture is synthesized by the Synopsys synthesizer. The synthesized circuits contain 7140 area. The results show that the speed of data processing can reach about 4M pixel/s.
【关键词】 图象编码;
超大规模集成电路;
VHDL综合技术;
离散子波变换;
【Key words】 Image coding; VLSI; VHDL Synthesis; Discrete wavelet transform (DWT);
【Key words】 Image coding; VLSI; VHDL Synthesis; Discrete wavelet transform (DWT);
- 【文献出处】 电子学报 ,Acta Electronica Sinica , 编辑部邮箱 ,1997年02期
- 【分类号】TP332
- 【被引频次】3
- 【下载频次】55