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形态算子的位串法实现

The Realization of Morphological Operators by the Bit serial Approach

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【作者】 生克伟郑建宏

【Author】 Sheng Kewei, Zheng Jianhong (Department of Radio Engineering, Chongqing University of Posts and Telecommunications, Chongqing 400065)

【机构】 重庆邮电学院无线电工程系

【摘要】 作者在灰度FP形态算子的最大最小表示的基础上给出了它们的位串实现结构。论文说明了灰度FP形态算子可以通过一个二进制处理电路的k次叠代使用而实现,此处k为输入信号二进制码的位数,其硬件复杂度为O(k).该数字实现结构上简单且模块化,适合VLSI实现。

【Abstract】 This paper presents a bit serial implementation architecture for the gray scale morphological FP(function processing) operators based on their max/min representations. It is shown in the paper that gray scale morphological operators can be realized by the k step recursive use of one binary processing circuit, where k is the number of bits in the input signals. The time area complexity of the proposed filtering operators is O(k). The proposed digital realization is simple and modular in sturcture, suitable for VLSI implementations.

  • 【文献出处】 重庆邮电学院学报 ,Journal of Chongqing University of Posts and Telecommunications , 编辑部邮箱 ,1997年03期
  • 【分类号】TN941.1
  • 【下载频次】7
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