节点文献
帧同步扰码器的并行化技术
Parallel Techniques for Frame Synchronous Scrambler
【摘要】 在同步数字系列(SDH)的集成系统中,需要用到并行扰码技术。本文提出了一种扩展矩阵的方法,使传统的矩阵法可以用来实现任意路数的并行扰码器。本文还提出了一种新的实现并行扰码的方法──延时因子法。由此实现的SDH8路并行扰码器已被用于专用集成电路中。
【Abstract】 Parallel scrambling techniques is required in the integrated system of Synchronous Digital Hierarchy(SDH).This paper presents a method to expand matrix which makes the traditional Matrix Method capable of realizing parallel scramblers of any size.A novel method called Delay Operator Method is also developed in this paper.The 8-bit parallel scrambler of SDH has been realized and integrated in the system.
- 【文献出处】 通信学报 ,JOURNAL OF CHINA INSTITUTE OF COMMUNICATIONS , 编辑部邮箱 ,1996年02期
- 【分类号】TN914.3
- 【被引频次】24
- 【下载频次】204