【摘要】 本文介绍了中国科学院计算技术研究所研制的功能分布式计算机系统中的GF-10/13模型机及其采用的时钟周期小于10毫微秒的一体化流水线设计技术.并指出了该流水线技术使用的最大延迟差确定时钟周期设计方法在超级计算机及相应的集成电路设计中应用的前景.更多还原

【Abstract】 This paper introduces an experimental pipelined computer GF-10/13. An integrated design technique has been developed to ensure the computer working with a very fast rate. Using ECL chips with 2ns gate delay, this model operates at a system clock period of less than 10ns. Applications of this technique in supercomputers and in their high speed I. C. s are also discussed.更多还原