【摘要】 CMOS工艺将成为VLSI电路的主流.本文所介绍的我们研制成功的3微米硅栅高速CMOS逻辑电路工艺;是在八十年代初国外刚开发成功推出的产品.该工艺开发的CC74HC系列电路.因采用3微米多晶硅栅自对准工艺。大大缩小了芯片尺寸,基本上消除了栅与源、漏的覆盖电容,使器件工作速度提高到8ns/门,触发器最大工作频率为55MC.这种电路的管脚排列与低功耗肖特基TTL(LSTTL)可互换,而功耗远低于LSTTL电路.本文对研制中的关键工艺作了讨论,并将产品与国外同类产品的主要参数作了比较.更多还原

【Abstract】 This paper describes a technique of nigh speed CMOS logic circuits with 3-μm silicon gate. The technique which is based on some key process researches such as fine stracture lithography, dry etch, control and modulation of threshold voltage etc, have developed early in the 80s only.The typical parameters of CC74HC circuits are 8ns for maximum propagation delay time, 55MC for maximum operation frequency and 20pf for power dissipation caqacitance.更多还原