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三维CMOS集成电路工艺及其性能研究
Three-Dimensional CMOS IC’s Technology and Characteristics
【摘要】 本文报道了一种三维(简写为3D)CMOS集成电路制造工艺及其性能.在P型单晶硅片上制作NMOS晶体管,在连续氩离子激光再结晶的N型多晶硅膜上制作PMOS晶体管,这两层器件之间用 LPCVD生长的二氧化硅层作隔离.已制成5μm沟道长度的9级3D-CMOS环形振荡器,每级门的延迟时间为2.7ns.
【Abstract】 This paper reports a three-dimensional (3-D) CMOS IC’s technology and characteristics.N-MOS transistors have been fabricated on a p-type single crystal silicon substrate.P-MOStransistors have been fabricated in an n-type siliconon-insulator films prepared by use of CWAr+ laser beam recrystallization.A LPCVD SiO2 layer is an insulator between N-MOS andP-MOS Transistors.Nine-stage 3D-CMOS ring oscillators with a 5μm channel length aremade with a propagation delay of 2.7 ns each.
- 【文献出处】 半导体学报 ,Chinese Journal of Semiconductors , 编辑部邮箱 ,1986年06期
- 【被引频次】2
- 【下载频次】100