【作者】 王欣；

【导师】 王煦法； 罗文坚；

【作者基本信息】 中国科学技术大学 ， 计算机应用技术， 2008， 博士

【摘要】 人工免疫系统(Artificial Immune System:AIS)是受生物免疫学原理启发而建立的智能计算方法。人工免疫系统的研究旨在通过挖掘生物免疫系统内在的信息处理机制,建立新的工程计算模型和算法,用于解决多种复杂的信息处理问题。人工免疫系统是生物免疫学与计算机科学相结合而形成的交叉研究领域,已经成为计算智能领域中新兴的研究热点。硬件免疫系统(Hardware Immune System:HwIS)是人工免疫系统领域中新出现的研究分支,近年来开始受到关注。它以人工免疫系统中的模型和算法为基础,探索用于实现容错硬件系统的新途径,为复杂硬件系统的在线故障检测建立新的模型和方法。本文旨在为硬件免疫系统在实际应用中面临的不完整自我集问题和脏自我集问题寻找可行的解决方案,并针对单片机IP核程序“跑飞”故障的检测问题设计和实现一个自适应硬件免疫系统。具体而言,本文的主要研究工作包括以下几个方面:(1)针对单片机IP核程序“跑飞”故障的检测问题,设计并实现了一个简单的硬件免疫系统。该系统具备基本的故障检测功能,其有效性在FPGA实验平台上得到了验证。然后,针对实际应用环境的特点,指出了硬件免疫系统可能面临的不完整自我集问题和脏自我集问题,并为应对这两个问题初步建立了一种自适应的硬件免疫系统框架。(2)针对硬件免疫系统在实际应用中面临的不完整自我集问题,通过借鉴生物免疫系统中的协同刺激机制,提出了一种基于协同刺激机制的自身耐受算法以及几种不同的检测器集合更新策略,使得硬件免疫系统既能够减少由于自我集不完整而导致的误报,又能够减少由于更新检测器集合而增加的漏报。这些算法和策略的有效性在模拟实验中得到了验证。该部分研究为硬件免疫系统较好地实现自身耐受提供了途径。(3)针对硬件免疫系统在实际应用中面临的脏自我集问题,提出了基于协同刺激机制的四种不同的脏自我集处理策略,以及针对自身反应候选检测器的受体编辑机制。脏自我集处理策略使硬件免疫系统能够通过补充新的检测器,来减少由脏自我集内的非我个体导致的漏报;而受体编辑机制则能提高生成新检测器的成功率。这些策略的有效性在模拟实验中得到了验证。该部分研究为解决硬件免疫系统的脏自我集问题提供了可行的途径。(4)针对实际应用中单片机IP核程序“跑飞”故障的检测问题,设计并实现了一个自适应的硬件免疫系统。该系统能够在协同刺激机制的协助下实现自我集和检测器集的自动更新,从而即能够减少由不完整自我集导致的误报,也能够减少由脏自我集导致的漏报。该系统对于解决不完整自我集问题和脏自我集问题的有效性在FPGA实验平台上得到了验证。本文首先构建了用于检测单片机IP核程序“跑飞”故障的具备基本故障检测功能的硬件免疫系统,然后提出了硬件免疫系统在实际应用中面临的不完整自我集问题和脏自我集问题,并针对这两个问题开展了具体的研究。本文先后介绍了硬件免疫系统中的自身耐受算法,针对不完整自我集问题的几种不同的检测器集合更新策略,以及四种不同的脏自我集处理策略,并通过模拟实验证明了这些算法和策略的有效性。根据这些算法和策略,本文设计和实现了用于检测单片机IP核程序“跑飞”故障的自适应硬件免疫系统,并在FPGA实验平台上验证了该系统的有效性。本文的工作不仅对硬件免疫系统的理论和应用研究有着重要的意义,而且对硬件免疫系统的工程应用有着实际的参考价值。更多还原

【Abstract】 Artificial Immune System (AIS) is an intelligent computation approach inspired by immunological principles. The field of AIS develops novel engineering computation models and algorithms by exploring the information processing mechanisms in the biological immune system for solving many kinds of complex problems of information processing. As an interdisciplinary research field derived from immunology and computer science, the AIS has become a rising hot field in the area of Computational Intelligence (CI).As a new branch of AIS research, Hardware Immune System (HwIS) is emerging as an attractive research field. Based on the models and algorithms of AIS, the HwIS explores new approaches to fault tolerance hardware system, and develops new models and methods for online fault detection of complex hardware systems.This dissertation develops feasible solutions for the incomplete self set problem and dirty self set problem of the hardware immune systems in practical applications, and designs and implements a self-adaptive hardware immune system for the detection problem of the faults of program running out of track in single-chip microcontroller IP cores. The research work of this dissertation consists of the following parts.(1) Aiming at the detection problem of the faults of program running out of track in single-chip microcontroller IP cores, a simple hardware immune system with fundamental fault detection functions is designed and implemented. The effectiveness of the system is verified on an FPGA experimental platform. Moreover, the incomplete self set problem and dirty self set problem of the hardware immune systems are presented considering the characteristics of the practical application environments. To deal with the two problems, a self-adaptive framework of hardware immune system is proposed.(2) Inspired by the co-stimulation mechanism in the biological immune system, a novel co-stimulation-based self-tolerant algorithm and several different detector set updating strategies are proposed to deal with the incomplete self set problem of the hardware immune systems in practical applications. In a hardware immune system with the novel algorithm and strategies, the false positives (events of recognizing a self individual as non-self) caused by the incomplete self set can be reduced, and the increase in the false negatives (events of recognizing a non-self individual as self) caused by updating the detector set can be reduced, too. The effectiveness of the algorithm and the strategies is verified by the simulated experiments. This part of work provides an approach to achieving self-tolerance in the hardware immune systems.(3) To deal with the dirty self set problem of the hardware immune systems in practical applications, four different co-stimulation-based strategies for dealing with the dirty self set problem and a receptor editing mechanism for dealing with the self-reactive candidate detectors are introduced. The strategies can reduce the false negatives caused by the non-self individuals in the dirty self set by recruiting new detectors, and the successful ratio of recruiting a new detector can be increased by the receptor editing mechanism. The effectiveness of the strategies is verified by the simulated experiments. This part of work provides an approach to the dirty self set problem of the hardware immune systems.(4) Aiming at the detection problem of the faults of program running out of track in the single-chip microcontroller IP cores in practical applications, a self-adaptive hardware immune system is designed and implemented. With the assistance of the co-stimulation mechanism, the system can update the self set and the detector set automatically. Consequently, both the false positives caused by the incomplete self set and the false negatives caused by the dirty self set can be reduced. The effectiveness of the implemented system for dealing with the problems of incomplete self set and dirty self set is verified on an FPGA experimental platform.In this dissertation, a simple hardware immune system with fundamental fault detection functions for detecting the faults of program running out of track in single-chip microcontroller IP cores is designed and implemented, and the incomplete self set problem and the dirty self set problem of the hardware immune systems in practical applications are presented and studied. To deal with the two problems, a novel self-tolerant algorithm, several different detector set updating strategies for dealing with the incomplete self set problem, and four different strategies for dealing with the dirty self set problem are introduced. The effectiveness of the introduced algorithms and strategies is verified by simulated experiments. According to the introduced algorithms and strategies, a self-adaptive hardware immune system for detecting the faults of program running out of track in single-chip microcontroller IP cores is designed and implemented, and the effectiveness of the system is verified on an FPGA experimental platform. The work of this dissertation is not only a solid contribution to the field of HwIS, but also a valuable example of the industrial applications of the hardware immune systems.更多还原