【作者】 朱彦卿；

【导师】 何怡刚；

【作者基本信息】 湖南大学 ， 电气工程， 2008， 博士

【摘要】 随着现代电子技术尤其是数模混合电路和片上系统技术的发展,对模拟和混合电路的测试及故障诊断的需求日益迫切。但由于模拟和混合电路本身的复杂性,使得传统的数字电路测试方法在模拟和混合信号电路测试及故障诊断中的应用前景和人们的期望相差甚远。因此本文对模拟和混合信号电路的测试及故障诊断问题进行了深入的研究,以现代测试技术为基础,提出了一些新的测试和诊断方法。本文的工作主要有以下几个方面:(1)研究了混合信号电路的电流测试方法。稳态电流测试已成为一种重要的数字电路测试方法被业界广为接受,瞬态电流测试作为传统测试方法的一个有益补充也正受到越来越多的关注。但在混合信号电路中,电流测试的研究仍处在初级阶段,因此本文在这方面进行了一些有益的探索性工作。在对混合信号电路的稳态、瞬态电流测试进行深入研究的基础上,本文提出了一种基于小波分析的混合信号电路动态电流测试及故障诊断方法。所提出的动态电流测试方法为混合信号电路的故障检测提供了一个有效手段。同时,所提出的基于小波变换的电流信号分析方法则有助于快速实现电路的准确测试及故障诊断。电流测试中电流传感器的设计至关重要,因此该测试方案还包括了一个满足动态电流测试要求的电流传感器的设计。对实例电路的测试实验结果表明了该方法的有效性。(2)研究了模数转换器静态参数的内建自测试结构。模数转换电路的静态参数作为表征模数转换器基本特性的参数,其测试的结果可成为系统性能评估的重要依据,因此进行模数转换电路特性参数测试的研究有着重要的现实意义。直方图法广泛用于模数转换电路静态参数测试中,但很少用于内建自测试的设计中。本文提出了一种基于码密度直方图分析算法测试模数转换电路静态参数的内建自测试结构。该内建自测试结构包括一个用于生成测试信号的模拟信号发生电路,以及简化的模数转换电路静态参数测量算法。该结构不仅硬件开销小、测试速度快,而且能够测试独立的模数转换电路电路。仿真试验表明,该信号发生器能按设计要求准确生成所需要的幅度、频率均可调的模拟测试信号。(3)研究了基于遗传算法的模糊神经网络在模拟电路故障诊断中的应用。基于传统神经网络的模拟电路故障诊断方法普遍存在网络收敛慢、易陷于局部最优等缺陷。因此,本文提出了一种融合遗传算法的模糊神经网络聚类模型对容差模拟电路故障诊断的新方法,该方法能对没有任何先验假设的测试数据进行准确的诊断。与传统的普通神经网络相比较,这种方法给出的模糊神经网络的学习既包括网络权值的修正,也包括模糊神经元中隶属度函数参数的调整,而且其模糊推理体现出来的权值易于理解。这种方法对包括容差在内的多故障的模拟电路的故障诊断的准确率有了进一步的提高,而且诊断时间也进一步缩短。实例测试表明这种方法是有效的。(4)研究了锁相环抖动的测量方法。锁相环电路广泛用于微处理器和通信系统的模拟/混合信号芯片中时钟信号的产生,而时钟抖动的测量问题日益成为关乎现代高速系统稳定性的一个重要部分。本文提出了基于有限长信号瞬时相位分析的锁相环时钟抖动测量方法。该方法先采用基于双窗函数频域法实现的希尔伯特变换来构造待测时钟信号的解析信号,再通过该解析信号分析待测信号的瞬时特性,从中提取出时钟的抖动。按该方法对实例含抖动时钟信号进行测试实验的结果表明所测抖动与在待测时钟信号中加入的抖动一致;在窗函数的对比实验中,由于基于双窗函数的谱分析方法极大地改善了快速快速傅氏变换的谱幅值估计精度,同时又没有降低谱的频率分辨率,因此该方法比其他方法表现出了更好的测量精度。实验结果表明了该测量方法能有效实现PLL输出时钟信号抖动值的准确测量。更多还原

【Abstract】 As modern electronic technology develops very rapidly,the research on the fault diagnosis theories methods for analog and mixed-signal circuits are becoming very popular and also challenging. However, traditional testing methods and fault diagnosis theories can not meet the actual requirement duo to the difficulties inherent in analog and mixed-signal circuits. On the other hand, some computation intelligence technologies and modern test technologies have come forth in recent years. Considering these new technologies might provide potential solution for fault diagnosis of analog and mixed-signal circuits, research on the application of modern test is done in this dissertation. The main works are as follows:(1)The research on the current testing for mixed-signal circuit has done. The quiescent power supply current (IDDQ) testing has been accepted by the industrial community as an important test method utilized abroad in digital CMOS IC testing, and it has ever worked out magnitude contribution for the test of digital IC. And, being regarded as an extension of the IDDQ testing, the transient current (IDDT) testing has drawn more and more attention in recent years. However, most previously work were focus on digital circuit testing, and few concerned analog and mixed-signal circuit testing. Based on the study of principle, feasibility and method of current testing, a wavelet analysis based dynamic current (Idd) testing method is proposed for mixed-signal circuit fault diagnosis. The Idd testing offers an effective solution to defect-oriented testing of mixed-signal circuit. The time-frequency resolution property of wavelet analysis helps to process the Idd signature for detecting and localizing fault. Experiments were performed on a 2-bit flash ADC circuit associated with a current sensor monitoring the supply current. The results demonstrate that the proposed methods not only have higher sensitivity than pure integral and FFT method in fault detection, but also can effectively isolate the faulty region in circuit. Furthermore, the comparison between different mother wavelets on the sensitivity of fault detection is addressed.(2)The research on the built-in self test (BIST) architecture for ADC static parameters testing. A very classical technique used to determine the static parameters of ADC offset, gain is the histogram method. The histogram method is widely used for the external testing of ADCs. However, the histogram-based BIST with complete on-chip determination of the ADC parameters is usually not considered as a viable solution because of the huge amount of required additional circuitry,especially the circuit of analog signal generator. Thus, such histogram-based BIST is presented. The scheme involves an on-chip signal generation, which provides accuracy triangle-wave as the stimulant signal of ADC testing. The BIST has the advantages of high testing speed and low area overhead for easily integrated on chip. The results of simulation show the performance of this architecture.(3)The research on genetic algorithm based fuzzy neural network for analog circuit fault diagnosis has been done. A systematic approach combining fuzzy neural network, wavelet analysis and genetic algorithm is proposed for fault diagnosis of analogue circuits. The presented fuzzy neural network is developed with the improved fuzzy weighted reasoning method. The optimal feature sets is extracted to train the network by using wavelet analysis as a preprocessor. This ensures a simple architecture for the neural network and minimizes the size of the training set required for its proper training. And the adjusting of connection weights and optimization of membership functions are performed with genetic algorithms. The reliability and comparison of this method with other methods are shown by active filter examples, and the results of experimental tests show that this method can satisfactorily detect and identify the faults.(4)The research on jitter measurement of phase-locked loops (PLLs) has been done. PLLs are ubiquitous circuit blocks in RF and mixed-signal integrated circuits. PLLs are extensively utilized as on-chip clock generators to synthesize a higher internal frequency from the external lower frequency. In all of the above applications, the jitter of PLLs is one of the most critical performance parameters and a fundamental limitation in these systems. Thus, an improved method is proposed to measure the jitter on PLLs output clock accurately. In this method, the jitter is measured by an analytic signal which is extended from the real signal of PLL output clock, and a double window functions method is used in the frequency analysis to optimize the performance. The results of simulations validate the satisfactory performance of proposed PLL jitter measurement, and the better performance compared with the other methods.更多还原