【作者】 付先成；

【导师】 邹雪城；

【作者基本信息】 华中科技大学 ， 微电子学与固体电子学， 2006， 博士

【摘要】 科学技术的发展日新月异,显示技术也在发生一场革命。在信息技术和互联网飞速发展的今天,知识、信息传播和即时交流越来越依赖显示技术,显示器件已成为全球性、实时性信息交流的主要手段。通讯技术和手持设备的发展,推动了中小尺寸图形显示技术的发展,也对图形显示控制芯片提出了更高的要求。一方面,为了延长电池的工作时间,要求图形显示控制芯片具有低功耗特性;另一方面,随着彩屏的普及和由其导致的显示数据量的增加,不但要求图形显示控制芯片具有色彩产生功能,而且还要提供各种图形加速引擎。本文通过对中小尺寸图形显示理论与方法的研究,研究并设计开发一款低功耗、集成多种图形引擎和高性能色彩产生电路的图形显示控制芯片。首先,在分析液晶显示动态驱动的时序模型、显示模式与存储结构、MCU(Micro Control Unit)接口标准和LCD(Liquid Crystal Display)显示接口标准的基础上,设计了一款集成多种图形引擎、支持多种微控制器接口和显示接口、内嵌帧缓存的高性能图形控制芯片的体系结构。从性能和功耗两个方面,对中央控制单元的电路结构做了优化设计。其次,分析了硬件旋转、画中画、透明显示和虚拟显示等各种图形加速引擎的原理,然后在此基础上找到扫描点位置(X,Y)与帧缓存地址Address之间存在的关系,推导出两者间的数学模型和硬件实现方法。在综合基于空间抖动算法和时间抖动算法各自特点的基础上,提出了在该设计中采取的灰度和色彩产生方法。并就空间抖动算法存在的块状效应和时间抖动算法引起的闪烁现象,分别提出了改进方法。然后,完成了该芯片的验证和后端设计。主要包括功能仿真、形式化验证、FPGA(Field Programmable Gate Array)验证、存储器内建自修复设计、低功耗设计和测试等。最后,完成了该芯片的样片功能测试和功耗分析。功能测试结果显示,该芯片的电路功能完全正确,存储器时钟工作速度高达70MHz,完全满足设计要求。而功耗分析结果显示该芯片具有非常低的功耗和高度的应用灵活性。更多还原

【Abstract】 With the rapid development of science and technology, a display technology revolution occurs. Especially with the advancement of internet and IT industry, knowledge, information dissemination and immediate communication relies more and more on display technology. As a result, display device has become the principal means for exchange of global, real-time information. The great progress of communications technology and handheld devices promotes the graphic display technology of small/medium scale, requires graphics controller be more powerful and effective. There are two main aspects as follow: in order to extend the working hours of battery, the graphics controller should be low power-consumed. On the other hand, with the popularity of color screen, which leads to an increasing volume of display data, not only the functions to produce colors but also different graphics acceleration engines are required.Through the research on the theory and methods of small/medium scale graphic display, a novel graphics controller with low power-consumed, integrated multiple graphics engines and high-performance color production circuits is designed.First, based on the analysis of timing models of dynamic LCD driver, display mode and memory structure, MCU interface standard and LCD interface standard, a architecture of high-performance graphics controller with integrated multiple graphics acceleration engines, a variety of MCU interface and display interface and embedded frame buffer is designed. From two aspects of the performance and power consumption, optimal design on the circuit structure of a central control unit has been done.Second, based on the analysis of the principles of various graphics acceleration engines such as hardware rotation, picture-in-picture, ink layer display, and virtual display and so on, the relationship between scanning position (X, Y) and the address of frame buffer is found. Then the mathematical model and hardware realization can be deduced. On the base of analyzing the respective characteristics of spatial dithering algorithm and temporal dithering algorithm, the method used in the design to gain the gray and color is put forward. In addition, according to the block effect in the spatial dithering algorithm and the flicker caused by temporal dithering algorithm, the improved methods are put forward respectively.Moreover, verification and back-end design of the chip including functional verification, formal verification, FPGA verification, memory built-in-self-repair, low power design and layout design are completed. Finally, functional test and power analysis of the sample chip have been finished. Functional test result shows that circuit function of the chip is completely correct and that memory’s clock frequency is up to 70MHz and completely satisfies the design requirements, while the result of power analysis shows that the chip has very low power consumption and high application flexibility.更多还原