【作者】 孟坚；

【导师】 陈军宁； 柯导明；

【作者基本信息】 安徽大学 ， 电路与系统， 2007， 博士

【摘要】 随着功率集成电路飞速发展，功率半导体器件也取得了飞快的进步，市场应用也逐步扩大。高压体硅LDMOS作为功率DMOS器件的一种横向高压器件非常适用于功率集成电路。这是因为：一方面LDMOS具有很高的击穿电压和良好的导通特性；另一方面，其栅、源和漏电极都在表面引出，从而非常容易和标准CMOS工艺相兼容，生产成本低。因此，近年来体硅LDMOS得到广泛的关注和研究。论文选题来自于863计划重大专项课题“高压驱动电路模块”。等离子显示屏PDP选址驱动芯片需要用于高压、大电流的高压晶体管去驱动和激发等离子显示屏工作。在整个PDP的成本中，其驱动电路占了很大的一部分，而选址芯片和扫描芯片又是驱动电路中成本最高的，因此对选址和扫描芯片的研究具有重大的意义。随着显示屏技术的不断提高，对选址驱动芯片的高压要求已经由最初的150V、120V下降到100V、80V甚至更低(50V)，饱和电流为40mA。高压晶体管设计的好坏将直接影响芯片性能的优劣。在工艺实现上，国外主要采用外延片来制备PDP选址驱动芯片，这种工艺成本较高。采用单阱非外延的高低压兼容工艺，用阱作为LDMOS的漂移区，则可以降低生产难度和成本。论文针对PDP选址驱动芯片中LDMOS管高耐压、大电流、低导通电阻等要求，利用MEDICI软件，结合器件的导通电阻、击穿电压、饱和电流等电学特性的相互影响，对器件结构的主要参数，包括漂移区的长度，浓度、结深以及场板的长度等进行了模拟和分析，确定LDMOS器件的各个结构参数。最终设计出满足实际需求的LDMOS器件。器件模型是电路仿真中不可缺少的重要元素，电路仿真结果能否正确的反映高压集成电路的电学特性，很大程度上依赖于所选取的器件模型的准确程度。由于高压LDMOS结构的多样性和复杂性，目前用于电路仿真的高压器件模型相当有限。因此建立能够用于SPICE仿真的高压器件模型成为亟待解决的问题。论文建立了LDMOS的电流模型；提出了有场极板的LDMOS高阻漂移区导通电阻的计算公式，改进了双扩散沟道导通电阻的计算公式；建立了LDMOS器件电容的物理模型，为器件的大信号、瞬态分析提供了依据。当器件的基本参数设计完毕后，器件的可靠性是设计者随之需要考虑的问题。可靠性是一个十分综合的概念，它牵涉到器件的结构、制造工艺以及应用条件等因素，原来的设计需要进一步加以优化。针对LDMOS的可靠性问题，论文研究了影响高压LDMOS可靠性的击穿特性。对于功率器件来说，LDMOS的功耗大小以及功耗的分布情况对器件性能也有重要的影响。功耗增大使器件发热量增加，温度上升，导致器件的可靠性变差。论文建立了LDMOS的宏模型，并利用所建模型计算由LDMOS构成的反相器的导通功耗和功率增益，对高压LDMOS的功耗进行分析和研究；还讨论了LDMOS的安全工作区问题。在高温微电子学的研究领域，制造高温硅器件和集成电路是一件顺其自然的事。国外对这一方面的工作开展得较早，自70年代末起，一些学者就积极地开展了硅材料高温器件和集成电路的研究。但早期的工作的主要目标是设计与制作双极型高温器件和厚膜集成电路。1984年后，开始有一些学者对高温MOS晶体管和CMOS集成电路进行了系统研究。他们对MOS晶体管的阈值电压、表面载流子的迁移率、亚阈值电流、漏源电流、泄漏电流等参数在25℃～300℃环境下的变化情况给出了高温电学特性方程和经验公式。80年代末，人们对高温大功率晶体管和SOI结构的MOS管进行了深入的研究。LDMOS也从此进入了高温功率器件的历史舞台，并得到越来越多的应用。对LDMOS的特性在不同温度下模拟和分析是精确估计器件性能的关键。在这种背景下，研究功率器件LDMOS的温度特性，得到LDMOS器件温度的模型，开发出一套LDMOS器件在高温下的设计方法具有非常重要的意义。论文在等温前提下，研究LDMOS阈值电压、迁移率、饱和电流、泄漏电流和导通电阻的温度效应。给出了阈值电压的一个最小均方逼近展开的线性表达式，得到了LDMOS阈值电压温度系数可以按一个常数来处理的结论，并导出其表达式；在给出高温高压LDMOS等效电路模型的基础上，推导出27℃～300℃导通电阻与温度关系的表达式。论文所建模型的计算结果和MEDICI软件仿真结果基本吻合。更多还原

【Abstract】 In recent years, power semiconductor devices are making great progress rapidly with the fast development of power integrated circuits, and correspondingly, their applications in markets are extending step by step. As one lateral power DMOS device, the High-voltage bulk LDMOS is very suitable for power integrated circuits because of high breakdown voltage and great on-state characteristics. Furthermore, the electrode gate, source and drain are lead on the surface of LDMOS, which bring on easy integration in the standard CMOS processand very low cost. Therefore, high-voltage bulk LDMOS has been investigated widely.The dissertation selects the topic from 863 project significant spacial topic (High Voltage Drive Circuits Module). The high-voltage and large-current transistor are required in the Plasma Displaying Panel(PDP) data driver to drive and inspire the PDP. Among the whole cost of the PDP, the drive circuits have occupied quitea large part of it. In addition, the costs of the data driver and the scan chips are highest, so it is necessary to investigate these chips. With the improving technology of displaying panels, the working voltage of data driver chip have been reduced from 150V, 120V to 100V, 80V even less(50V) and the saturation current is only 40mA. The design of high-voltage transistor directly determines the performance of chips. The data driveris produced by the epitaxial technology abroad, but this technology costs a lot. If the single well process compatible to low-voltage process is substituted for the epitaxial technology to produce the drift region of LDMOS, the manufacture cost and difficulty can be cut down. Considering the requirements of high breakdown voltage, large current, low on-resistance in data driver, main structural parameters of LDMOS, including the length, the doping concentration and the junction depth of drift region and the length of the field plate, were obtained with the help of numerical simulation software -MEDICI by analyzing the mutual influences among the on-resistance, breakdown voltage and saturation current.Device models are essential for circuits simulations. Whether the results of simulations could predict the PIC’ sperformance exactly, the precise HV device model was important and wanted. Because of the variety and complexity, at present, the amount of HV models is limited for PIC Computer Aided Design (CAD). Therefore, it is necessary and urgent to establish the SPICE modeling for PICCAD. In this dissertation, acurrent model of LDMOS is established and the expressions which include improved on-resistance model for double-diffused channel and drift region with field plate in LDMOS ispresented. The physical models of the capacitances in LDMOS are also built up to support the analysis of large signal and transient properties.After designing the basic parameters of devices, the designer should take the following problem of reliability into account. As a very synthetical concept, the reliability involves the structure of devices, manufacture process and applying conditions. The original design needs further to optimize. In view of the reliability of LDMOS, the author investigates the breakdown property which affects the reliability. As far as the power devices are concerned, the power dissipation and its distribution also have great effects on the device performances. The author builds up a macro-model and calculates the power dissipation and gain of an LDMOS invertor by using the model. The power dissipation and safe operation area of LDMOS are both discussed in details.In the high temperature microelectronics area, it is very natural to manufacture high-temperature silicon devices and Ies. Overseas researchers early developed this aspect work. Since the end of 70’s, some scholars have carried on the investigations of high-temperature silicon devices and ICs positively. The early work took aim to design and manufacture high-temperature bipolar devices and thick film ICs. After 1984, some scholars started to research on high-temperature MOS transistor and CMOS IC systematically. They have given out several experiential formulae and equations of high-temperature electrical characteristics about the threshold voltage, surface mobility of carriers, sub-threshold current, drain current and leakage current variations under 25～300℃. At the end of 80’s, high-temperature and large power transistor and SOI MOS have been studied thoroughly and LDMOS have entered historical arena henceforth and obtained more and more applications.The key to accurately evaluate the performances of devices lies on the simulation and analysis of LDMOS properties under various temperatures. Under such a background, it is significant to investigate the temperature characteristic and obtain the temperature model and provide a set of design methods under high-temperature. The temperature effects of threshold voltage, mobility, saturation current, leakage current and on-resistance are discussed here in the case of equal temperature and a linear expression of threshold voltage is proposed. Then the conclusion is drawn that the temperature coefficient can be regarded as a constant whose expression is also derived. At last, according to the equivalent circuits of LDMOS, the expression describing relationship between the on-resistance and temperature is presented which can applied in the temperature range from 27℃to 300℃. The results of proposed model make an agreement with simulated results by MEDICI.更多还原