【作者】 刘凯；

【导师】 吴成柯；

【作者基本信息】 西安电子科技大学 ， 信号与信息处理， 2005， 博士

【摘要】 基于小波变换的内嵌编码技术已成为当前静止图像编码领域的主流,其中主要的内嵌编码算法有基于分层树集合分割排序(Set Partitioning in Hierarchical Trees,SPIHT)算法和优化截取的内嵌码块编码(Embedded Block Coding with Optimized Truncation,EBCOT)算法。这两种算法均具有码流可随机获取以及良好的恢复图像质量等特性,因此成为实际应用中首选算法。随着对图像编码技术需求的不断增长,尤其是在军事应用领域如卫星侦察等方面,这些优秀的编码算法亟待转换为可应用的硬件编码器。 在静止图像编码领域,高性能的图像编码器设计一直是相关研究人员不懈追求的目标。本文针对静止图像编码器的设计作了深入研究,并致力于高性能的图像编码算法实现结构的研究,提出了具有创新性的降低计算量、存储量,提高压缩性能的算法实现结构,并成功应用于图像编码硬件系统中。本文主要的工作成果可以概括如下: 1.提出了一种基于行的实时提升小波变换实现结构。该结构同时处理行变换和列变换,并且在图像边界采用对称扩展输出边界数据,使得图像小波变换时间与传统的小波变换相比提高了将近2.6倍,提高了硬件系统的实时性。该结构还合理地利用和调度内部缓冲器,不需要外部缓冲器,大大降低了硬件系统对存储器的要求。 2.提出了一种比特平面与编码过程全并行处理的EBCOT编码实现结构。通过分析指出了不仅每一个编码比特平面,而且对应编码过程的编码信息可以同时获得,从而给出了比特平面与编码过程全并行处理的块编码方法和实现的VLSI结构。 3.提出了一种采用深度优先搜索流处理的比特平面并行SPIHT编码结构。在该编码结构中,空间定位生成树采用深度优先遍历方式,比特平面同时处理极大地提高了编码速度。 4.提出了一种低复杂度的光谱图像压缩编码算法,并设计实现了该算法的硬件系统。该系统可应用于我国探月计划和光谱图像压缩的硬件研制方案中。 5.设计实现了一套适合于卫星图像传输并符合JPEG2000标准的硬件编码器。该编码器采用了比特平面与编码过程全并行处理的EBCOT编码算法,大大提高了系统处理速度,并且该编码器提供通用接口,可以很方便地与其他系统连接。更多还原

【Abstract】 Embedded wavelet coding technique is a main method for image coding. Especially SPIHT (Set Partitioning in Hierarchical Trees) and EBCOT (Embedded Block Coding with Optimized Truncation) are two very important algorithms. Because of good restored image and random access for coding stream, these algorithms become the first choices in practice. With increasing requirements for image coding in many application fields, especially in military application aspects such as satellite surveillance etc, these excellent algorithms must be implemented in hardware urgently.In the image coding field, the design of high performance image coder is always the goal that many relative researchers pursue. As for performance, low memory, low power and real time processing are hot points in research. In the paper, author studies the design of image coder in deep, especially places emphasizes on implemental architectures of coding algorithm with high efficiency and performance. The paper presents creatively implementation architectures with low computation and memory for real-time processing. The proposed architectures have been applied to real coding system successfully. The followings are main content of this paper:1. A VLSI architecture of line-based real-time lifting discrete wavelet transforms. The architecture processes horizontal filtering and vertical filtering simultaneously in 2-D transform using synmtery boundary. The transform time for one image equals to one image transmission time that is 2.6 times faster than traditional method. For reducing memory requirement, the architecture only uses and schedules internal buffer without external buffer.2. An efficient architecture composed of bit plane-parallel and pass-parallel coder for EBCOT entropy encoder. After the detailed analysis of EBCOT algorithm, the coding information of each bit plane and the corresponding passes can be obtained simultaneously. Therefore, bit plane-parallel and pass-parallel coding (BPPP) is proposed, and its VLSI architecture is shown in details.3. A bit plane-parallel architecture for a modified SPIHT algorithm using depth-first search bit stream processing. In the architecture, the coding information of each bit plane can be obtained simultaneously. The coefficient tree is traveled by depth-first search manner Then, the corresponding VLSI architecture to implement the formulated requirements is presented.4. A low complex compression algorithm for spectrum image and its hardwaresystem. The system has been applied to the moon exploration plan, and passed first stage test.5. The JPEG2000 standard hardware coder for satellite image trassmission. The coder uses BPPP architecture for EBCOT mentioned above to reduce processing time. And a common net interface is implemented in coder for data exchange with external network.更多还原